Sine wave static inverter

ABSTRACT

A sine wave static inverter produces a sine waveform from the output of a step wave generator by removing the higher harmonics from a step waveform. A first embodiment short circuits the higher harmonic signals across the secondary winding of a transformer thus permitting only the first harmonic sine wave to reach the output. A second embodiment applies only higher harmonic signals from a generated step waveform 180* out of phase with a second generated step waveform so that only the first harmonic of the second step waveform appears at the output.

i United States Patent 1111 3,614,589

[72] Inventors Ralph H. Ireland References Cited Warminster, Pm;

Joseph D seam, Cherry Hm NJ. UNITED STATES PATENTS [21] APPLNQ 20,7012,239,437 4/1941 Bedford 32l/DIG.1 [22] Wed Mans 1970 3,031,629 4/1962Kadri 321/27MS Patented (M19 1971 3,100,851 8/1963 Rossetal. 321/0104 r3,334,292 8/1967 Kingetal 32l/9A 73 T ed t r l 1 Assgnee Ammcaas3,430,073 2/1969 Leonard 32l/DIG.1

"presented by secretary Navy 3 453 797 7/1969 Larsen 321/27 MS PrimaryExaminer-William M. Shoop, Jr. Attorney.rR. S. Sciascla and Henry HansenABSTRACT: A sine wave static inverter produces a sine waveform from theoutput ofa step wave generator by removing the higher harmonics from astep waveform. A first em- SINE WAVE STATIC INVERTER bodiment shortcircuits the higher harmonic signals across the 8 claimss Drawing Figssecondary winding of a transformer thus permitting only the [52] U.S.Cl.321/9 A, fir t harmonic sine wave to reach the output. A second em-321/27 MS bodiment applies only higher harmonic signals from a [51] Int.Cl. H02m 1/12 g n ed step waveform 180 out of phase with a second Fieldof Search. 321/9 A, generated step waveform so that only the firstharmonic of the 18, 27, 27 MS, DIG. I second step waveform appears atthe output.

(04 I "o 72a PULSE STEPWAVE g ummomc LOAD GENERATOR GENERATOR ANALYZER(FIG 21 (FIG 3) m VOLTAGE Ii REGULATOR 1% i so T 72b STEPWAVE LGENERATOR I (FIG 31 I 0c 1 I721; POWER SUPPLY I VOLTAGE REGULATORPAIENTEnncI 19 um SHEETI UF 3 LOAD 4 72 PULSE STEPWAVE 1 GENERATORGENERATOR F m (FIG. 2') (FIG. 3)

Fig 1 ,VOLTAGE REGULATOR 0.c. POWER SUPPLY 112 104 no 72a 1 X PULSESTEPWAVE g 'HARMONIC LOAD GENERATOR ENERATOR A ANALYZER (FIG. 2) (FIG.3)

L "I 72c voL'rAGE REGULATOR 72b STEPWAVE L F 5 115 GENERATOR 1 (FIG. 3)

L ac. 72b POWER L f SUPPLY I 103 r r k D'Q INVENTORS VOLTAGE g RALPH H.IRELANp REGuLAToR JOSEPH o. SEGREST BY L ZATTORNEY PAIENTEUum 19 IanSHEET 3 OF 3 u. M .H .H. M .H..H .HHHHm ll. |l|||| Ill lllllllllllulllillllllll III III! vbll.

MUNPMWMWMUU Hm J 1 I. .iliulfilll llllmll A B C D B 4 5 6 7 8 9 O 1 aINVENTORS RALPH H. IRELAND JOSEPH D. SEGREST TIME ATTORNEY STATEMENT OFGOVERNMENT INTEREST The invention described herein may be manufacturedand used by or for the Government of the United States of America forgovernmental purposes without the payment of any royalties thereon ortherefor.

BACKGROUNDOF THE INVENTION FIG. 4 is a representation of typical signalsas applied to the embodiment of FIG. 1; and

FIG. 5 is a block diagram ofa second embodiment of the invention.

DESCRIPTION OF THE PREFERRED EMBODIMENTS Referring now to FIGS. 1, 2 and3 there is shown a pulse generator which includes a unijunctionoscillator 11 connected to a conventional divide by 12 counter 12. A DCpower supply is connected to both oscillator 11 and counter 12. Thecounter 12 provides four outputs A, B, C and D with each outputconnected to an input of 12 NAND-gates 13-24, inclusive, making a totalof 48 connections. The graphic symbols used for the logic components onthe figures conform to MIL-STD-806B 26 Feb. 1962. The 1"s indicate highlevel pulses and the 0"s indicate low level pulses. The operation ofcounter 12 and NAND-gates 13-24, inclusive, is shown in the followingtable:

Counter outputs NAND gates outputs D'CB Sample periods obbbt-n-nocoooOHHOOQOHHOQO tional static inverters have not provided the retrofitcapability required in current military aircraft.

SUMMARY or THE INVENTION Accordingly, it is the general purpose of thepresent invention to provide an AC power source of relatively simple andlight construction which has none of the aforementioned limitations anddisadvantages.

In both of the preferred embodiments of the invention a sine wave isgenerated by sequentially pulsing power transistors connected tomultiple taps on the primary windings of power transformers in a mannerthat would normally generate multiple step waveforms in the secondarywindings of the transformers. However the higher harmonics of the stepwaveforms are internally removed in the transformer by specialconnections leaving a pure sine wave output.

The first embodiment accomplished this by providing a shorting pathacross the secondary side of a single transformer for higher harmonicsignals of a step waveform and then removing from a fraction of thesecondary winding a pure sine wave.

The second embodiment provides two transformers each connected on theprimary winding in such a manner to generate a step wave signal on thesecondary winding. The two secondary windings are interconnected 180 outof phase with each other with a filter therebetween providing a highimpedance to the first harmonic of such step waves and a low impedanceto the higher harmonics. In this manner the higher harmonic signals fromthe second transformer are applied to the first transformer inhibitingthe generation of such higher harmonic signals in the first transformerleaving a pure sine wave at the output ofthe first transformer.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a bloclt diagram of oneembodiment of the invention:

FIG. 2 is a schematic diagram of a pulse generator in the embodiment ofFIG. 1;

FIG. 3 is a schematic diagram of a step wave generator in the embodimentofFIG. 1;

The table shows substantially the same information on the counter 12 andNAND-gates 13-24, inclusive, that is shown graphically in FIG. 4. Theoutputs are shown broken down into 12 time periods. Each periodrepresenting one cycle operation of the 4,800 cps. oscillator 11. It cantherefore be seen that the entire sequence shown repeats at the rate of400 cps.

The outputs of the NAND-gates 13-24 are applied to respective identicalidentical inverter amplifiers 26-37. The outputs of inverter'amplifiers26-37 are connected to the inputs of selected OR gates 38-43, inclusive,with inverter amplifiers 26 and 31, 27 and 30, 28 and 29, 34 and 35, 33and 36, 32 and 37 respectively connected to OR gates 38, 39, 40, 41, 42and 43.

The outputs of OR-gates 38-43, inclusive, as shown in FIG. 2 areconnected to identical amplifiers 44 whose outputs are supplied toterminals 46-51, inclusive, ofgenerator 10.

A step wave generator 90 includes ix identical transformers 45 that havetheir primary windings connected respectively to terminals 46-51,inclusive, and their secondary windings connected between the base andemitter electrodes of respective PNP power transistors 52-57, inclusive.The collector terminals of the power transistors are connected torespective taps 59-64, inclusive, on the primary winding 66 oftransformer 58. A center tap 74 on the primary winding 66 is connectedto ground. The winding 66 is divided between taps into sections -85,inclusive. 7

The secondary winding 65 of transformer 58 providing the output of stepwave generator has multiple taps 71, 72 and- 73 with taps 71 and 72connected to the system output terminals and 111 with a load 112connected across the terminals.

A parallel filter circuit 95 comprising an inductor 67 and capacitor 68of such values so as to provide resonance at 400 cps. is connected totaps 71 and 73. A DC power supply 115 is connected to provide power to avoltage regulator 69. The voltage regulator 69 is connected across theoutput load 112 for sensing the output signal and in addition forcontrolling the voltage supplied to the primary winding 66 oftransformer 58 through transistors 52 57, inclusive.

The operation of the above-described embodiment will now be described asapplied to typical signals. A DC input is provided to both oscillator 11and counter 12 by means of DC power supply 25. Oscillator 11 provides a4,800 cps. signal to counter 12. The outputs A, B, C and D of counter 12are then applied to NAND-gates 13-24, inclusive. It is obvious that acounter with other combinations of binary signals can be used withoutdeparting from the scope of the invention.

Referring to FIG. 2, at time interval t t, NAND-gate 13 receives a 1"pulse from A and from B, C and D. The 0" pulses B, C and D are invertedto l pulses at the input to NAND-gate 13 so that an output pulseappears. This output pulse is inverted so that a 0 pulse appears at theoutput of NAND-gate 13. In similar fashion it can be shown that theremaining NAND-gates 14-24, inclusive, are pulsed in sequence.

,Inverter amplifiers 26-37 then invert the signals received fromNAND-gates 13-24 and provide outputs to selected OR- gates 38-43,inclusive. The outputs of OR-gates 38-43 are then applied to amplifiers44 for suitable amplification to provide proper interface with theremaining components.

The outputs of the amplifiers 44 appearing on terminals 46-51,inclusive, provide the output signals of the pulse generator 10. Thesesignals are applied to identical transformers 45 so that when a pulseappears at any of the terminals 46-51, a signal is generated in thesecondary winding of the connected transformer 45 and applied to therespective one of transistors 52-57 to bias the transistor into itsconducting state. This in turn permits power from voltage regulator 69to be applied to the primary windings of transformer 58. To be morespecific the operation of transistor 52 places a voltage from voltageregulator 69 on sections 80, 81 and 82 of winding 66. The operation oftransistor 53 places a voltage from voltage regulator 69 on sections 81and 82, etc. It can therefore be seen that the operation of transistors54 or 55 provide a maximum output voltage to the secondary winding 65since the turns ratio of N, to N, would be highest upon the operation ofthese transistors. It can likewise be seen that the operation of eithertransistor 52 or 57 would provide the smallest output voltage in thesecondary of transformer 58. The operation of the respective transistorsfollows that shown in FIG. 2 for respective OR-gates 38-43, inclusive,and from this it can be seen that this will generate in the secondary oftransformer 58 the step wavefonn shown. A step waveform as shown in FIG.2 is known to be rich in odd harmonics and only the first harmonic, the400 cycle signal, is wanted at the load 112. The parallel circuit 95comprising of inductor 67 and capacitor 68 is chosen so as to provide ahigh impedance resonance to the first harmonic, while providing ineffect a short circuit to all higher harmonics in the step wavegenerated. The higher harmonies generated will circulate around a closedloop comprising winding 65 in series with the parallel combination ofinductor 67 and capacitor 68. As a result only the first harmonic of thegenerated waveform will appear at the load 112. A filter circuit 95 witha relatively high Q should be chosen because it is the third harmonic,the 1,200 cps. signal which must see a low impedance in the closed loopif a high quality sine wave is to be obtained. The voltage regulator 69senses the output signal going to load 112 and, accordingly, adjusts theinput voltage to the primary side of the transformer so that the properoutput voltage may be maintained.

A second embodiment of the invention is shown in FIG. in which similarcomponents to those in FIG. 1 have the same numerical designation. Someof the components also have letters following such numerical designationfor the purpose of aiding in identification.

A pulse generator provides outputs to its terminals 46-51. Two lines areconnected to each of the terminals 46-51 with one line from eachterminal going to step wave generators 90a and 90b. Generator 90a hasoutput terminals shown as 71a, 72a and 73a. Generator 90b has outputterminals shown as 71b, 72b and 73b.

The output of step wave generator 90a is connected from terminals 71aand 73a to output tenninals 110 and 111 that have a load 112 acrossthem. The output terminals 710 and 73a of generator 90a are alsoconnected to the respective output terminals 73b and 71b of generator90b so that the step waves generated by both generators are l out ofphase. In addition, a filter network 95 is connected between terminals73a and 71b of generators a and 90b. An automatic voltage regulatedpower supply 69 is connected across output ter minals 71a, 73a and, inaddition, supplies power to step wave generator 900 in the same manneras generator 90. A variable DC power supply 103 has its supply leadsconnected to generator 90b in the same manner as voltage regulator 69supplies generators 90 and 90a. An harmonic analyzer 104 is connectedacross the terminals 1 l0 and 1 11.

The operation of the embodiment of FIG. 3 will now be described. Pulsegenerator 10 provides output pulses of the same sequence as in theembodiment of FIG. 1 to terminals 46-51. These pulses are applied togenerators 90a and 90b in the same manner as generator 90 so as togenerate step wave signals. The generators 90a and 90b are connected toeach other at their outputs in such manner that the generated waves are180 out of phase and therefore aid in canceling each other. Amodification of the step wave generated by 90b is to be supplied to thesecondary windings of 90a as the filter circuit provides a highimpedance resonant circuit to the first harmonic of the generated wavesteps. Therefore, the first harmonic of the step wave generated bygenerator 90b is greatly attenuated. The higher harmonics generated bygenerator 90b are supplied to the secondary winding of the transformerof generator 90a and these harmonics being out of phase with theharmonics generated in generator 90a tend to cancel out all higherharmonics leaving only the first harmonic sine wave of the step wavegenerated by generator 904. The voltage regulator 69 senses the voltagereceived at the load 1 l2 and adjusts the input to generator 90a inorder to maintain a constant output. The harmonic analyzer 104 placedacross output terminal terminals and 111 indicates the presence ofhigher harmonic signals in the output so that an operator of the devicemay adjust the input to generator 90b from the variable DC supply 103 inorder to provide maximum cancellation of the higher harmonic signals.

Thus, two embodiments of a static sine wave generator for use at highaltitudes with retrofit for existing systems has been described thatgenerates a pure sine wave from DC voltage supplied without the use ofany rotating equipment.

Many modifications and variations of the present invention are possiblein the light of the above teachings. For example, since the firstharmonic of the output of generator 90b was not used a smallertransformer than for generators 90 or 90a could be used. Also theharmonic analyzer 104 may be replaced by a phase sensitive harmonicdetector used to control the output from the DC supply 103 so as toautomatically null the output from the voltage. Accordingly, it is to beunderstood that within the scope of the appended claims the inventionmay be practiced otherwise than as specifically described.

What is claimed is:

l. A static inverter for providing a sine wave output signal comprising:

pulse generating means for supplying at a plurality of output terminalsa series of predetermined sequential output pulses; switching meansreceiving said output pulses for providing sequentially a first DC powersupply at respective ones of a plurality of output terminals thereof;and

sine wave-generating means receiving said supply at respective ones of aplurality of input terminals and having a transformer including multipletaps spaced on the primary winding respectively connected to said inputterminals, and first, second and third spaced taps on the secondarywinding of said transformer, said second tap being connectedintermediate of said first and third taps, and filter means connectedbetween said first and third taps for providing a sine wave outputsignal at said first and second taps.

2. A static inverter according to claim 1 wherein said filter meansfurther comprises:

a capacitor and inductor connected in parallel between said first andthird taps with a resonance at the sine wave output frequency.

3. A static inverter according to claim 2 wherein said switching meansfurther comprises:

a first DC power supply means for providing said first DC power supply;

a voltage regulator connected to receive said first DC power supply andsaid sine wave output signal for regulating the voltage of said first DCpower supply in response to the magnitude of said sine wave outputsignal; and

a plurality of transistors with input terminals operatively connected tosaid pulse-generating means output terminals and said voltage regulatorfor sequentially providing said first DC power supply at respective onesof said plurality of switching means output terminals.

4. A pulse generator according to claim 4 wherein said pulse-generatingmeans further comprises:

a second DC power supply means for providing a second DC power supply;

a unijunction oscillator connected to receive said second DC powersupply for providing pulse signals;

a divider counter connected to receive said second DC power supply andsaid oscillator pulse signals for providing sequential binary signals;

a plurality of NAND gates with each said NAND gate connected to receivesaid sequential binary signals and respectively providing spaced pulseoutput signals at a frequency of said oscillator pulse signals dividedby the number of said NAND gates;

a plurality of OR gates with each said OR gate operatively connected toreceive said spaced output signals from a plurality of said NAND gatesfor supplying at a plurality of said pulse-generating means outputterminals a series of predetermined sequential output pulses.

5. A static inverter for providing a sine wave output signal comprising:

a pulse-generating means for supplying at a plurality of outputterminals a series of predetermined sequential output pulses;

switching means receiving said output pulses and having a first DC powersupply means for providing a first DC power supply, a voltage regulatorconnected to receive said first DC power supply and a sine wave outputsignal for regulating the voltage of said first DC power supply inresponse to the magnitude of said sine wave output signal, a variable DCvoltage supply connected to receive said first DC power supply foradjusting the voltage of said first DC power supply, a first pluralityof transistors with input terminals operatively connected to saidpulsegenerating means output terminals and said voltage regulator forsequentially providing said first DC power supply at respective outputterminals of said first plurality of transistors, and a second pluralityof transistors with input terminals operatively connected to saidpulse-generating means output terminals and said variable DC voltagesupply for sequentially providing said first DC power supply atrespective output terminals of second plurality of transistors; and

sine wave-generating means receiving said DC supply having first andsecond transformers, said first and second transformers each includemultiple taps spaced on the primary windings respectively connected tosaid input terminals, and two spaced taps on the secondary windings,said two spaced taps of said first transformer operatively connected tosaid two spaced taps of said second transformer so that signalsgenerated by said first and second transformers are out of phase witheach other, and a filter means having a capacitor and inductor connectedin parallel between said first and second transformers two spaced tapswith a resonance at the sine wave output frequency for provldmg the sinewave output signal at said first transformer.

6. A pulse generator according to claim 5 wherein said pulse generatingmeans further comprises:

a second DC power supply means for providing a second DC power supply;

a unijunction oscillator connected to receive said second DC powersupply for providing pulse signals;

a divider counter connected to receive said second DC power supply andsaid oscillator pulse signals providing sequential binary signals;

a plurality of NAND gates with each said NAND gate connected to receivesaid sequential binary signals and respectively providing spaced pulseoutput signals at a frequency of said oscillator pulse signals dividedby the number of said NAND gates;

a plurality of OR gates with each said OR gate operatively connected toreceive said spaced pulse output signals from a plurality of said NANDgates for supplying at a plurality of said pulse generating means outputterminals a series of predeten-nined sequential output pulses.

7. A static inverter according to claim 6 further comprising:

a harmonic analyzer connected to said first transformer secondarywindings for sensing the presence of higher harmonics in said outputsine wave signal.

8. A static inverter for providing a sine wave output signal comprising:

pulse-generating means for supplying at a plurality of output terminalsa series of predetermined sequential output pulses;

switching means receiving said output pulses for providing sequentiallya first DC power supply at respective ones of a plurality of outputterminals thereof; and

sine wave-generating means having first and second transformers withinput tenninals having multiple taps spaced on each transformer primarywinding sequentially receiving said first DC power supply and two spacedtaps on each transformer secondary winding, one secondary winding spacedtap of said first transformer operatively connected to one secondarywinding spaced tap of said second transformer with a filter means forblocking a predetermined frequency and passing higher harmonics of thepredetermined frequency connected therebetween, the other secondarywinding spaced tap of said first transfonner connected to the othersecondary winding spaced tap of second transformer, the interconnectionof said secondary windings spaced taps being so that signals generatedby said first and second transformers are 180 out of phase with eachother for providing a sine wave output signal.

1. A static inverter for providing a sine wave output signal comprising:pulse generating means for supplying at a plurality of output terminalsa series of predetermined sequential output pulses; switching meansreceiving said output pulses for providing sequentially a first DC powersupply at respective ones of a plurality of output terminals thereof;and sine wave-generating means receiving said supply at respective onesof a plurality of input terminals and having a transformer includingmultiple taps spaced on the primary winding respectively connected tosaid input terminals, and first, second aNd third spaced taps on thesecondary winding of said transformer, said second tap being connectedintermediate of said first and third taps, and filter means connectedbetween said first and third taps for providing a sine wave outputsignal at said first and second taps.
 2. A static inverter according toclaim 1 wherein said filter means further comprises: a capacitor andinductor connected in parallel between said first and third taps with aresonance at the sine wave output frequency.
 3. A static inverteraccording to claim 2 wherein said switching means further comprises: afirst DC power supply means for providing said first DC power supply; avoltage regulator connected to receive said first DC power supply andsaid sine wave output signal for regulating the voltage of said first DCpower supply in response to the magnitude of said sine wave outputsignal; and a plurality of transistors with input terminals operativelyconnected to said pulse-generating means output terminals and saidvoltage regulator for sequentially providing said first DC power supplyat respective ones of said plurality of switching means outputterminals.
 4. A pulse generator according to claim 4 wherein saidpulse-generating means further comprises: a second DC power supply meansfor providing a second DC power supply; a unijunction oscillatorconnected to receive said second DC power supply for providing pulsesignals; a divider counter connected to receive said second DC powersupply and said oscillator pulse signals for providing sequential binarysignals; a plurality of NAND gates with each said NAND gate connected toreceive said sequential binary signals and respectively providing spacedpulse output signals at a frequency of said oscillator pulse signalsdivided by the number of said NAND gates; a plurality of OR gates witheach said OR gate operatively connected to receive said spaced outputsignals from a plurality of said NAND gates for supplying at a pluralityof said pulse-generating means output terminals a series ofpredetermined sequential output pulses.
 5. A static inverter forproviding a sine wave output signal comprising: a pulse-generating meansfor supplying at a plurality of output terminals a series ofpredetermined sequential output pulses; switching means receiving saidoutput pulses and having a first DC power supply means for providing afirst DC power supply, a voltage regulator connected to receive saidfirst DC power supply and a sine wave output signal for regulating thevoltage of said first DC power supply in response to the magnitude ofsaid sine wave output signal, a variable DC voltage supply connected toreceive said first DC power supply for adjusting the voltage of saidfirst DC power supply, a first plurality of transistors with inputterminals operatively connected to said pulse-generating means outputterminals and said voltage regulator for sequentially providing saidfirst DC power supply at respective output terminals of said firstplurality of transistors, and a second plurality of transistors withinput terminals operatively connected to said pulse-generating meansoutput terminals and said variable DC voltage supply for sequentiallyproviding said first DC power supply at respective output terminals ofsecond plurality of transistors; and sine wave-generating meansreceiving said DC supply having first and second transformers, saidfirst and second transformers each include multiple taps spaced on theprimary windings respectively connected to said input terminals, and twospaced taps on the secondary windings, said two spaced taps of saidfirst transformer operatively connected to said two spaced taps of saidsecond transformer so that signals generated by said first and secondtransformers are 180 * out of phase with each other, and a filter meanshaving a capacitor and inductor connected in parallel between said firstand second transformers two spaced taps with a resonance at the sinewave output frequency for providing the sine wave output signal at saidfirst transformer.
 6. A pulse generator according to claim 5 whereinsaid pulse generating means further comprises: a second DC power supplymeans for providing a second DC power supply; a unijunction oscillatorconnected to receive said second DC power supply for providing pulsesignals; a divider counter connected to receive said second DC powersupply and said oscillator pulse signals providing sequential binarysignals; a plurality of NAND gates with each said NAND gate connected toreceive said sequential binary signals and respectively providing spacedpulse output signals at a frequency of said oscillator pulse signalsdivided by the number of said NAND gates; a plurality of OR gates witheach said OR gate operatively connected to receive said spaced pulseoutput signals from a plurality of said NAND gates for supplying at aplurality of said pulse generating means output terminals a series ofpredetermined sequential output pulses.
 7. A static inverter accordingto claim 6 further comprising: a harmonic analyzer connected to saidfirst transformer secondary windings for sensing the presence of higherharmonics in said output sine wave signal.
 8. A static inverter forproviding a sine wave output signal comprising: pulse-generating meansfor supplying at a plurality of output terminals a series ofpredetermined sequential output pulses; switching means receiving saidoutput pulses for providing sequentially a first DC power supply atrespective ones of a plurality of output terminals thereof; and sinewave-generating means having first and second transformers with inputterminals having multiple taps spaced on each transformer primarywinding sequentially receiving said first DC power supply and two spacedtaps on each transformer secondary winding, one secondary winding spacedtap of said first transformer operatively connected to one secondarywinding spaced tap of said second transformer with a filter means forblocking a predetermined frequency and passing higher harmonics of thepredetermined frequency connected therebetween, the other secondarywinding spaced tap of said first transformer connected to the othersecondary winding spaced tap of second transformer, the interconnectionof said secondary windings spaced taps being so that signals generatedby said first and second transformers are 180* out of phase with eachother for providing a sine wave output signal.